9 Factors of PCB Design Causing Signal Integrity Problems in PCB
For designers, it is an extremely complex task to avoid signal integrity problems in PCB. It requires an in-depth understanding of signal integrity design rules and technologies. With the introduction of faster logIC series, designers have realized that SIMple PCB layout cannot meet the signal integrity requirements.
High speed design has special signal integrity problems, which may cause you headaches if not handLED properly. It is always recommended that engineers consider some of the best PCB design services to minimize signal integrity problems in the early design cycle, thus avoiding expensive design iterations.
In the process, we will provide more insights on the following topics:
What is the signal integrity in a PCB?
Requirements for signal integrity in PCB
9 Factors Causing Signal Integrity Problems in PCB
What is the signal integrity in a PCB?
Signal integrity (SI) represents the ability of a signal to propagate without distortion. Signal integrity is simply the quality of the signal through the transmission line. When the signal propagates from the driver to the receiver, it can measure the amount of signal attenuation. At a lower frequency, this problem is not a major problem, but an important factor to consider when PCB runs at a higher speed and a higher frequency (>50MHz). In the high-frequency state, attention should be paid to both the digital and analog aspects of the signal.
The influence of transmission medium on signal integrity.
When the signal is transmitted from the driver to the receiver, it will not remain unchanged, and any signal originally sent will be received with varying degrees of distortion. The signal distortion is caused by impedance miSMAtch, reflection, ringing, crosstalk, jitter and ground bounce. The main goal of designers should be to minimize these factors so that the original signal can reach the destination with minimum distortion. Special attention is also required to maintain signal quality and control its adverse effects in electronic circuits.
Requirements for signal integrity in PCB
When we encounter signal integrity problems in PCB, it may not work as expected. It may work in an unreliable way - sometimes it doesn't work. It may work in the prototype phase, but it often fails in mass production. It may work in the laboratory, but cannot operate reliably on the site; It is valid in older production batches, but invalid in new production batches, and so on.
It deforms, that is, its shape changes from the desired shape
Harmful electronic noise will be superimposed on the signal, thus reducing its signal-to-noise ratio (S/N)
It will generate harmful noise for other signals and circuits on the board
A PCB is considered to have necessary signal integrity when:
All the signals in it will not be distorted
Its equipment and interconnection are not easily affected by the external electrical noise and electromagnetic interference (EMI) of other electrical products around it, and its performance meets or exceeds the regulatory standards
According to or superior to regulatory standards, it will not generate, introduce or radiate EMI in other circuits/cables/products connected to or near it.
9 Factors Causing Signal Integrity Problems in PCB
The most important reason for signal integrity problems in PCB may be the faster signal rise time. When circuits and equipment work at medium and low frequencies with medium rise and fall times, signal integrity problems caused by PCB design rarely occur. However, when we work at higher (RF and higher) frequencies, the signal rise time is much shorter. Therefore, the signal integrity caused by PCB design becomes a very big problem.
The reduction of rise time is critical to signal integrity.
Factors that cause the decrease of signal integrity in PCB:
In general, fast signal rise times and high signal frequencies increase signal integrity problems. For analysis, we can divide various signal integrity problems into the following categories:
1. Signal attenuation caused by uncontrolled line impedance
The signal quality on the network depends on the characteristics of the signal trace and its return path. During the operation on the line, if the signal encounters the change or non-uniformity of the line impedance, it will suffer reflection and cause ringing and signal distortion.
Moreover, the faster the signal rise time is, the greater the signal distortion caused by the change of uncontrolled line impedance will be. We can reduce or eliminate the change of line impedance by the following methods to minimize the signal distortion caused by reflection:
Ensure that the signal line and its return path act as a unified transmission line with a unified controlled impedance.
The signal return path is placed near the signal layer as a uniform plane.
Make sure that the controlled impedance signal line sees matching source impedance and receiver impedance – the same characteristic impedance as the signal line. This may require adding appropriate terminating resistors at the source and receiver.
2. Signal attenuation due to other impedance discontinuities
Impedance discontinuities cause ringing and signal distortion.
As mentioned earlier, if the signal encounters impedance discontinuity in the process of transmission, it will suffer reflection and cause ringing and signal distortion. Discontinuities in line impedance will occur under one of the following conditions:
When a signal encounters a via in its path. When the signal splits into two or more lines. When the signal return path plane encounters discontinuity, such as the crack in the plane when connecting the wire root to the signal wire.
When the wire root is connected to the signal wire. When the signal line starts at the source end. When the signal line terminates at the receiver end. When the signal and return paths are connected to the connector pins.
Moreover, the faster the signal rise time is, the greater the signal distortion caused by impedance discontinuity. We can minimize the signal distortion caused by discontinuous line impedance by the following methods:
By using smaller via and HDI PCB technology, the effects of discontinuities caused by via and via stubs can be minimized.
Reduce the length of the trace stub. When signals are used at multiple locations, routing is done in daisy chain rather than multi branch branching. The terminal resistances of the source end and the receiving end are correct. Using differential signals and tightly coupled differential pairs, they are substantially less affected by discontinuities in the signal return path plane. Ensure that at the connector where discontinuity occurs, the signal line should be as short as possible and the signal return path should be as wide as possible.
3. Signal attenuation due to propagation delay
It takes a limited amount of time for the signal to travel from the source to the receiver on the PCB. The signal delay is proportional to the length of the signal line and inversely proportional to the signal speed on a specific PCB layer. If the data signal and clock signal do not match the overall delay, they will arrive at the receiver at different times for detection, which will lead to signal skew; Excessive skew can cause signal sampling errors. As the signal speed becomes higher and higher, the sampling rate becomes higher and higher, and the allowable deflection becomes smaller, which makes it easier to generate errors caused by deflection.
Prompt: Signal delay matching (mainly the routing length matching) can minimize the deflection in a group of signal lines.
4. Signal attenuation due to signal attenuation
Due to the loss caused by the conduction line resistance (increased at higher frequencies due to skin effect) and the dielectric material dissipation factor Df, the signal will be affected by attenuation when propagating on the PCB circuit. These two losses increase with the increase of frequency, so the higher frequency component of the signal will suffer greater attenuation than the low frequency component; This will reduce the signal bandwidth, and then cause signal distortion due to the increase of signal rise time; If the signal rise time is too long, data detection error will be caused.
Prompt: when signal attenuation is an important consideration, it is necessary to select the correct type of low loss high-speed materials and properly control the routing geometry to minimize signal loss.
5. Signal attenuation due to crosstalk noise
Fast voltage or current conversion on the signal line or return path plane may be coupled to adjacent signal lines, resulting in harmful signals near crosstalk and switching noise on adjacent signal lines. Coupling occurs due to mutual capacitance and mutual inductance between wires. This mutual capacitive and inductive coupling can be reduced by increasing the space between the wires. As a rule of thumb, the space should be three times the width of the routing (3W). As usual, faster rise time signals produce more crosstalk and switching noise.
Crosstalk and switching noise can be reduced by:
Increase the interval between adjacent signal routes. Make the signal return path as wide as possible and uniform as a uniform plane, and avoid separated return paths. Use PCB materials with low dielectric constant. Using differential signals and tightly coupled differential pairs, they are inherently less affected by crosstalk.
6. Signal attenuation caused by power supply and ground distribution network
The impedance of the power and ground rails or paths or planes is very low, but the impedance is non-zero. When the output signal and the internal door switch states, the current passing through the power and ground rails/paths/planes will change, resulting in a drop in voltage in the power and ground paths. This will reduce the voltage between the device power supply and the ground pin. In this case, the higher the frequency is, the faster the signal conversion time is, and the more the number of line switching states is, the greater the voltage drop at both ends of the power supply and ground wire. This will reduce the noise tolerance of the signal. If it is too large, it will cause equipment failure.
To reduce these effects, the distribution network must be designed to minimize the impedance of the power system:
The power plane and grounding plane should be as close together as possible, and as close to the PCB surface as possible. This will reduce through hole inductance.
Multiple low inductance decoupling capacitors should be used between the power supply and the ground rail, and they should be placed as close as possible to the power and ground pins of the device.
Packaging of equipment using short leads.
Using a thin high capacitance core for power and ground wires will greatly increase capacitance and reduce the impedance between power and ground wires. Read how we can reduce parasitic capacitance in PCB layout.
7. Signal attenuation due to EMI/EMC
EMI/EMC increases with increasing frequency and signal rise time. For single ended signal current, the far field intensity of radiation increases linearly with frequency, while for differential signal current, it increases linearly with frequency
8. Signal integrity problems caused by via stub and trace stub
The via stub is part of a via that is not used for signal transmission. The via stub acts as a resonant circuit with a specific resonant frequency in which it stores the maximum energy. If the signal has an important component at or near this frequency, the component of the signal will be seriously attenuated due to the energy demand of the through-hole stub at its resonant frequency. In the example described below, part A of the via is used for signal propagation from the outer conductor C1 to the inner conductor Cn. But part B of the vias is redundant – therefore, the vias stub. Learn more about through-hole piles and their impact on signal attenuation and data transmission rates here. The Circuit board assembly, circuit board design, and circuit board processing manufacturers explain 9 factors that cause signal integrity problems in PCB.
Via stub will cause serious attenuation of signal in PCB.
A longer short line may act as an antenna, thus increasing the problem and failing to meet EMC standards. Stub tracking also generates reflections that negatively affect signal integrity. Pull up or pull down resistors on high-speed signals are common sources of stubs. If such a resistor is required, the signal is routed as a daisy chain.
9. Signal integrity problems caused by ground bounce
The ground reference level of the circuit is offset from the original due to excessive current drawn. This is caused by grounding resistance and interconnection resistance (such as bonding wire and routing wire). Therefore, the ground voltage level at different points in the grounding will be different. This is called ground bounce because the ground voltage varies with the current.
Techniques to reduce ground bounce:
Implement decoupling capacitor to local ground. Contains a series connected current limiting resistor. Place the decoupling capacitor close to the pin. Run on proper ground.
The rise time of signal is a key parameter in SI problem. To achieve the desired level of signal integrity, we should focus on impedance control, attenuation, ground bounce, propagation delay, and EMI/EMC. Signal integrity measures should be adopted in PCB design stage, because we can not always propose new designs. It is better to deal with it in advance, rather than letting it destroy the performance of the device in real time. Check out the article on how to implement a robust PCB design workflow to achieve signal integrity? Collect more information about PCB design to improve signal integrity.