For each dielectric thickness value, note the required line width for the 50 ohm characteristic impedance.

I will perform these actions in **Altium Designer** using the layer stack manager so that users can replicate them. In the figure below, I show a set of spacing values required for differential microstrip lines with different wire widths and dielectric thicknesses (labeled H below, plotted for 100 ohm differential impedance target and Dk = 4.8, without considering dispersion or roughness). The idea here is to determine the spacing required for a given width, with the goal of reaching a specific differential impedance value.

Figure 1. Spacing and width value pairs will provide 100 ohm differential impedance on Dk = 4.8 substrates of varying thickness.

Note that for clarity, the Y-axis is scaled on a logarithmic scale. We can generate a new set of curves for other Dk values and differential impedance values. These curves should account for the effect of dielectric thickness; As the distance between the microstrip line and its ground plane increases, the width-spacing required to achieve a 100-ohm impedance becomes less dependent on the ground distance (see 60-mil-impedance and 45-mil-impedance curves).

How do the width values shown above compare to those required for the 50 ohm characteristic impedance? The following figure shows these values. This is a good linear model, which illustrates the saturation that occurs at wider linewidth; When the trajectory is very wide, the ratio becomes constant.

FIG. 2. Relation between dielectric thickness and wire width when Dk = 4.8 substrate characteristic impedance is 50 ohm.

Now based on the values of the characteristic impedance and the wire-width/spacing pairs shown above, we can determine that the wire-width that leads to the 50 ohm mode impedance also produces the spacing of the 50 ohm characteristic impedance.

Figure 3. Spacing and width comparison of 100 ohm differential impedances on Dk = 4.8 substrates of different thicknesses.

This graph may seem complicated, but it has a simple explanation. The value of the spacing at which each curve intersects 1 on the Y-axis will result in a line width in the difference pair equal to the line width when the line is not part of the difference pair, while still providing the same impedance. In other words, isolated and paired trails will have the same width and 50 ohm impedance at a specific spacing value for each dielectric thickness.

Unfortunately, odd-mode impedance and characteristic impedance are never equal. This only happens with large spacing constraints, or when pairs are separated by infinite distances! The value of y = 1 is the asymptote on this graph. If the dielectric is thin (< 15 mils), then for a given line spacing in the difference pair, you will be closer to making the line widths coincide.

For example, if we take the 5 Mil dielectric in Figure 3 and we calculate the line width of the odd-mode impedance, we will get 6.184 mil. If I then used it to calculate the characteristic impedance, I would get a value of 55 ohms, or a deviation of only 10%. This is the high end of the impedance deviation you can accept in some signal standards. For example,** USB SuperSpeed** is more forgiving, allowing for large variations in differential impedance (and therefore odd-mode impedance).

Use spacing and line width to your advantage

You may wonder, is it really that important to have a single line width that applies to both characteristic and odd-mode impedances? There are three good reasons for this:

It transforms the problem of designing differential channels from one involving 2 variables to one involving 1 variable: spacing.

It is easier for manufacturers to ensure controlled impedance when you design only a single trace width for differential and **single-ended impedance**. Depending on the tolerances in your design, you can use a width to satisfy both single-ended and differential specifications.

You can decouple wiring while routing differential channels, even very close to the receiver, and you don't have to worry about reflections because each end of the wiring will match the input impedance of each port as seen from the receiver.

Note that this is easier on thinner mediums, where the correspondence between characteristic trace widths and **odd-mode trace** widths will not be nearly the same. You can also choose another style, such as coplanar difference pairs, if you want more leeway when working with thicker dielectric.