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Changing trends of crosstalk
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Changing trends of crosstalk

The magnitude of mutual inductance and mutual capacitance affects the magnitude of crosstalk, and thus changes the characteristic impedance and propagation speed of the transmission line equally. Similarly, the geometry of the transmission line greatly affects the variation of mutual inductance and mutual capacitance, so the characteristic impedance of the transmission line itself also has an effect on these parameters. In the same medium, the coupling between the relatively low-impedance transmission line and the reference plane (ground plane) is stronger, and the coupling with the neighboring transmission line is weaker, so the impedance change of the low-impedance transmission line due to crosstalk is less.

Several effects of crosstalk

In high-speed, high-density PCB design, a complete grounding plane is generally provided, so that each signal line basically only interacts with its nearest signal line, and the cross-coupling from other distant signal lines can be ignored. Nevertheless, in analog systems, very high crosstalk resistance is required when a high-power signal passes through a low-level input signal or when a component with a higher signal voltage (such as TTL) is in close proximity to a component with a lower signal voltage (such as ECL). In PCB design, if not handled correctly, crosstalk has the following two typical effects on the signal integrity of high-speed PCBS.

1 False trigger caused by crosstalk

Signal crosstalk is an important part of signal integrity problem in high-speed design, and the function error caused by crosstalk is the most common one.

A typical transmission of adjacent network error logic caused by crosstalk pulses. The signal transmitted on the interference source network is transmitted through the coupling capacitor, causing a noise pulse between the interfered network and the receiving end, resulting in an unwanted pulse being sent to the receiving end. If the pulse intensity exceeds the trigger value of the receiving end, it will produce an uncontrollable trigger pulse, causing the logical function of the next level of the network to be confused.


2 Timing delay caused by crosstalk

Timing is an important consideration in digital design. Figure 5 shows the timing problems caused by crosstalk noise. The bottom half of the figure shows two kinds of noise pulses generated by the interference source network (Helpful Figure 5 Delay glitch and Unhelpful glitch caused by crosstalk noise). When the helpful glitch pulse is superimposed on the interfered network, the signal transmission delay of the interfered network is reduced. Similarly, when the noise pulse (Unhelpful glitch) is superimposed on the interfered network, it increases the delay of the normal transmission signal of the interfered network. Although this crosstalk noise to reduce the network transmission delay is helpful to improve the PCB timing, but in the actual PCB design, due to the uncertainty of the interference source network, this delay is uncontrollable, so the delay caused by this crosstalk must be suppressed.

3. Minimize crosstalk

Crosstalk is prevalent in high-speed, high-density PCB designs, and the impact of crosstalk on the system is generally negative. In order to reduce crosstalk, the most basic is to make the coupling between the interference source network and the interfered network as small as possible. It is impossible to completely avoid crosstalk in high-density complex PCB design, but in system design, designers should choose appropriate methods to minimize crosstalk without affecting other system performance. Combined with the above analysis, the crosstalk problem is mainly solved from the following aspects:

The distance between transmission lines should be extended as far as possible if the wiring conditions permit. Or minimize the parallel length between adjacent transmission lines (cumulative parallel length), preferably between different layers.

The direction of the two adjacent signal layers (without plane layer isolation) should be vertical, and parallel lines should be avoided as far as possible to reduce cross-talk between layers.

In the case of ensuring the signal timing, choose a device with a low conversion speed as much as possible, so that the change rate of electric and magnetic fields is slow, thereby reducing crosstalk.

In the design of layering, under the condition of satisfying the characteristic impedance, the medium layer between the wiring layer and the reference plane (power or ground plane) should be as thin as possible, thus increasing the coupling degree between the transmission line and the reference plane, and reducing the coupling of adjacent transmission lines.

Because the surface layer has only one reference plane, the electric field coupling of the surface layer is stronger than that of the middle layer, so the signal lines that are more sensitive to crosstalk are distributed in the inner layer as much as possible.

The amplitude of crosstalk can be greatly reduced by terminating the impedance of the far end and the near end of the transmission line to match the transmission line.

4. Closing remarks

Digital system design has entered a new stage. Many of the high-speed design issues that used to be of secondary importance now have a critical impact on system performance. The problems of signal integrity, including crosstalk, have brought about changes in design concepts, design processes and design methods. In the face of new challenges, for the crosstalk noise, the most critical is to find those networks that have a real impact on the normal operation of the system, rather than blind suppression of crosstalk noise on all networks, which is also contradictory to limited wiring resources. The crosstalk problem discussed in this paper is very important to solve the crosstalk problem in high speed and high density circuit design.

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