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Altium Designer PCB design rules for English and Chinese comparison
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Altium Designer PCB design rules for English and Chinese comparison

Electrical code

Clearance: Clearance rules

Short Circuit: Short circuit rule

UnRouted Net: unrouted network rule

UnConnected Pin: unconnected pin rule


Routing rules

Width: specifies the cable width rule

Routing Topology: indicates the routing topology layout rule

Routing Priority: indicates the routing priority rule

Routing Layers: indicates the rules for routing boards

Routing Corners: rules for routing corners

Routing Via Style: rules for routing via style

Fan out Control: Fan out control rule

Differential Pairs Routing: differential pairs routing rule


SMT (sheet pad rule)

SMD To Corner: Rules for minimum spacing between SMD pad and wire corner

SMD To Plane: specifies the minimum spacing between the holes of the SMD pad and the power layer

SMD Neck Down: indicates the rule of SMD neck down


Mask (welding resistance layer rules)

Solder Mask Expansion: Solder mask expansion

Paste Mask Expansion: specifies the shrinkage of the welding layer


Plane (Power layer rule)

Power Plane Connect Style: Power plane connect style

Power Plane Clearance: specifies the clearance rules of the power layer

Polygon Connect Style: Rules for the connection types of pads and coppers


TestPoint (test point rule)

Testpoint Style: Testpoint style rule

TestPoint Usage: test point usage rule



Minimuman nularring: minimum width rule of the solder ring to prevent the solder ring from falling off.

Acute Angle: Rules for limiting acute angles

Hole Size: indicates the rule for limiting the aperture

Layer Pairs: Setting rules for pairing layers, setting the start and end layers for all electrical symbols of boreholes (pad and through holes).

Hole To Hole Clearance: hole to hole clearance

Minimum SolderMask Sliver:

Silkscreen Over Component Pads: Rules for spacing between silkscreen over component pads

Silk To Silk Clearance: indicates the rule of silk clearance

Net Antennae: rules for network antennas


High Speed (high frequency circuit rules)

ParallelSegment: parallel copper film line spacing limit rules

Length: indicates the network length restriction rule

Matched Net Lengths: rules for matching network lengths

Daisy Chain Stub Length: Specifies the length limit rule for branches of Daisy wiring

Vias Under SMD: SMD pad hole restriction rule

Maximum Via Count: indicates the maximum number of holes


Placement (component placement)

Room Definition: element collection definition rule

Component Clearance: Component clearance clearance rules

Component Orientations: Component orientations rule

Permitted Layers: Rules allowing components to be arranged in slates

Nets To Ignore: Nets to ignore rules

Hight: Height rule


Signal Integrity (rule for signal integrity)

Signal Stimulus: Rule of stimulus

Undershoot-Falling Edge: negative overshoot limit rule

Undershoot-Rising Edge: The rule limiting the overshoot

Impedance: impedance limit rule

Signal Top Value: indicates the high level signal rule

Signal Base Value: indicates the low level signal rule

Flight Time-Rising Edge: Flight time rule

Flight Time-Falling Edge: Falling time rule

Slope-Rising Edge: indicates the time rule of Rising Edge

Slope-Falling Edge: indicates the time rule of Falling Edge

Supply Nets: power supply network rules

4. In order to reduce cross-talk between lines, the distance between printing lines can be increased if necessary, and some zero-volt lines can be inserted as line isolation. Especially between input and output signals, three decoupling, filtering, isolation three technologies

1. Decoupling, filtering and isolation are three commonly used measures for hardware anti-interference.

2. The power input terminal is connected to an electrolytic capacitor of 10~100uf. If possible, 100uF + is preferable; In principle, each IC chip should be arranged with a 0.01pF ceramic capacitor. If the printed circuit board gap is not enough, a 1-10pf capacitor can be arranged every 4~8 chips. For devices with weak anti-noise ability and large power supply changes during shutdown, such as RAM and ROM memory devices, the de-coupling capacitor should be directly connected between the power cord and the ground wire of the chip.

3. Filtering refers to the classification of various signals by frequency characteristics and the control of their direction. Commonly used are a variety of low-pass filter, high-pass filter, bandpass filter. The low-pass filter is used on the connected AC power line and is designed to allow 50 weeks of AC to pass through smoothly, bringing other high-frequency noise into the ground. The configuration index of the low-pass filter is the insertion loss. If the insertion loss of the low-pass filter is too low, it cannot suppress the noise, while if the insertion loss is too high, it will lead to "leakage" and affect the personal safety of the system. High-pass and band-pass filters should be selected according to the signal processing requirements in the system.

4. The typical signal isolation is photoelectric isolation. The photoelectric isolation device is used to isolate the input and output of the single chip microcomputer. On the one hand, the interference signal cannot enter the single chip microcomputer system. On the other hand, the noise of the single chip microcomputer system itself will not be transmitted out in the way of conduction. Shielding is used to isolate space radiation. The components with large noise, such as switching power supply, are covered with metal boxes, which can reduce the interference of noise source to the single-chip microcomputer system. Especially afraid of interference analog circuit, such as high sensitivity of weak signal amplifier circuit can be screened up. And it is important that the metal shield itself must be connected to the real SkE safety and electromagnetic compatibility network.

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