In general, there are two main rules for laminated design:
1. Each routing layer must have an adjacent reference layer (power supply or formation);
2. The adjacent main power layer and the ground should be kept at a minimum distance to provide a large coupling capacitance.
The following is an example of a two-layer to eight-layer stack:
A, single-side PCB boardand double-side PCB board laminated
For two layers, because the number of layers is small, there is no lamination problem. EMI radiation control is mainly considered from the wiring andlayout;
The electromagnetic compatibility of single - layer and double - layer plates is becoming more and more prominent. The main reason for this phenomenon is that the area of the signal loop is too large, which not only produces strong electromagnetic radiation, but also makes the circuit sensitive to external interference. The simplest way to improve the electromagnetic compatibility of a line is to reduce the loop area of a critical signal.
Critical signal: From the perspective of electromagnetic compatibility, critical signal mainly refers to the signal that produces strong radiation and is sensitive to the outside world. The signals that can produce strong radiation are usually periodic signals, such as low signals of clocks or addresses. Interference sensitive signals are those with low levels of analog signals.
Single and double layer plates are usually used in low frequency simulation designs below 10KHz:
1) Route the power cables on the same layer in a radial manner, and minimize the sum of the length of the lines;
2) When walking the power supply and ground wire, close to each other; Lay a ground wire near the key signal wire as close as possible. Thus, a smaller loop area is formed and the sensitivity of differential mode radiation to external interference is reduced. When a ground wire is added next to the signal wire, a circuit with the smallest area is formed, and the signal current must be routed through this circuit rather than the other ground path.
3) If it is a double-layer circuit board, it can be on the other side of the circuit board, close to the signal line below, along the signal line cloth a ground wire, a line as wide as possible. The resulting circuit area is equal to the thickness of the circuit board multiplied by the length of the signal line.
The lamination of two and four layers of plates
1. Sig-gnd (PWR)-PWR (GND)-SIG;
For both of these laminated designs, the potential problem is with the traditional 1.6mm (62mil) plate thickness. Layer spacing will become large, not only conducive to control impedance, interlayer coupling and shielding; In particular, the large spacing between the power supply strata reduces the plate capacitance and is not conducive to noise filtering.
For the first scheme, it is usually used in the case of a large number of chips on the board. This scheme can get better SI performance, but EMI performance is not so good, which is mainly controlled by wiring and other details. Main attention: The formation is placed in the signal layer of the most dense signal layer, conducive to absorption and suppression of radiation; Increase the plate area to reflect the 20H rule.
For the second scheme, it is usually used where the chip density on the board is low enough and there is sufficient area around the chip to place the required power copper coating. In this scheme, the outer layer of PCB is all stratum, and the middle two layers are signal/power layer. The power supply on the signal layer is routed with a wide line, which can make the path impedance of the power supply current low, and the impedance of the signal microstrip path is also low, and can also shield the inner signal radiation through the outer layer. From an EMI control point of view, this is the best 4-layer PCB structure available.
Main attention: the middle two layers of signal, power mixing layer spacing should be opened, the direction of the line is vertical, avoid crosstalk; Appropriate control panel area, reflecting 20H rules; If the impedance of the wires is to be controlled, very carefully lay the wires under the copper islands of the power supply and ground. In addition, the power supply or laying copper should be interconnected as much as possible to ensure DC and low frequency connectivity.
Three, six layers of laminated plates
For the design of high chip density and high clock frequency, the design of 6-layer board should be considered. The lamination method is recommended:
For this scheme, the lamination scheme achieves good signal integrity, with the signal layer adjacent to the grounding layer, the power layer paired with the grounding layer, the impedance of each routing layer can be well controlled, and both layers can absorb magnetic lines well. In addition, it can provide better return path for each signal layer under the condition of complete power supply and formation.
For this scheme, this scheme only applies to the case where the device density is not very high. This layer has all the advantages of the upper layer, and the ground plane of the top and bottom layer is relatively complete, which can be used as a better shielding layer. It is important to note that the power layer should be near the layer that is not the main component plane, because the bottom plane will be more complete. Therefore, EMI performance is better than the first scheme.
Summary: For the scheme of six-layer board, the spacing between the power layer and the ground should be minimized to obtain good power and ground coupling. However, although the plate thickness of 62mil and the spacing between layers are reduced, it is still difficult to control the spacing between the main power source and the ground layer very small. Compared with the first scheme and the second scheme, the cost of the second scheme is greatly increased. Therefore, we usually choose the first option when we stack. During design, follow 20H rules and mirror layer rules.
The lamination of four or eight layers of plates
(a) This is not a good lamination method due to poor electromagnetic absorption capacity and large power impedance. Its structure is as follows:
1.Signal 1 component surface, microstrip wiring layer
2.Signal 2 internal microstrip routing layer, good routing layer (X direction)
4.Signal 3 Strip line routing layer, good routing layer (Y direction)
5.Signal 4 Cable routing layer
7.Signal 5 internal microstrip wiring layer
8.Signal 6 Microstrip wiring layer