There is always impedance discontinuity in PCB design. How to solve it
We all know that impedance must be continuous But there will always be a time when PCB boards cannot be continuous. What should I do?
characteristic impedance: also known as "characteristIC impedance", it is not a DC resistance and belongs to the concept of long-term transmission. In the high frequency range, in the signal transmission process, when the signal edge arrives, due to the establishment of the electric field, a transient current will be generated between the signal line and the reference plane (power supply or ground plane). If the transmission line is isotropic, there will always be a current I as long as the signal is transmitted. If the output voltage of the signal is V, the transmission line will be equivalent to a resistance, V/I, in the signal transmission process. This equivalent resistance is calLED the characteristic impedance Z of the transmission line. During signal transmission, if the characteristic impedance of the transmission path changes, the signal will be reflected at the node with discontinuous impedance. The factors affecting the characteristic impedance are dielectric constant, dielectric thickness, line width and copper foil thickness.
(1) Gradient line
Some RF equipment packages are very SMAll. The SMD pad width may be as small as 12 mm, and the RF signal line width may exceed 50 mm. Use gradient lines to prevent sudden changes in line width. The gradient line is as shown in the figure, and the line of the transition part should not be too long.
If the RF signal line runs at right angles, the effective line width at the corner will be increased, and the impedance will be discontinuous, resulting in signal reflection. In order to reduce discontinuity, there are two ways to handle corners: chamfer and fillet. The radius of the arc angle shall be large enough. In general, R>3W should be ensured.
(3) Large pad
When there is a large pad on the 50 ohm microstrip line, the large pad is equivalent to the distributed capacitance, which destroys the continuity of the characteristic impedance of the microstrip line. Two methods can be adopted at the same time to improve: one is to thicken the microstrip line medium, and the other is to empty the ground plane below the pad. Both methods can reduce the distributed capacitance of the pad.
The through hole is a metal cylinder plated from the through hole between the top layer and the bottom layer of the circuit board. The signal hole connects transmission lines of different layers. The through hole stub is the unused part of the through hole. The vias are annular pads that connect vias to the top or internal transmission lines. Isolation pads are annular spaces in each power or ground plane to prevent short circuits between the power and ground planes. If the parasitic parameters of the vias are obtained through strict physical theoretical derivation and approximate analysis, the equivalent circuit model of the vias can be modeled as a grounded capacitor connected in series at both ends of the inductor. The equivalent circuit model of the via shows that the via itself has parasitic capacitance to the ground. Assuming that the diameter of the bonding pad of the vias is D2, the diameter of the vias is D1, the thickness of the PCB is T, and the dielectric constant of the board substrate is Q µ, the parasitic capacitance of the vias is SIMilar to: the parasitic capacitance of the vias will cause the signal rise time to be prolonged, the transmission rate to be slowed down, and the signal quality to be deteriorated. Similarly, via also has parasitic inductance. In high-speed digital PCB, the harm of parasitic inductance is often greater than that of parasitic capacitance. Its parasitic series inductance will weaken the contribution of bypass capacitor, thus reducing the filtering effect of the entire power system. Suppose L is the inductance of the through-hole, h is the through-hole length, and d is the diameter of the central hole. The approximate parasitic inductance of the via is similar to that of the via, which is one of the important factors causing the impedance discontinuity of the RF channel. If the signal frequency is greater than 1GHz, the effect of vias should be considered. Common methods to reduce via impedance discontinuities include using a diskless process, selecting a lead out method, and optimizing the diameter of the anti-static pad. Optimizing pad diameter is a common method to reduce impedance discontinuity. Since the characteristics of through-hole are related to the structure size of hole diameter, pad, pad, stacking structure and lead out method, it is recommended to use HFSS and Optimetrics to optimize analogy according to the specific situation in each design. When using parametric models, the modeling process is simple. During the review, PCB designers are required to provide corresponding simulation files. Through hole diameter, pad diameter, depth and anti pad will change, resulting in impedance discontinuity, serious reflection and insertion loss.
(5) Through hole coaxial connector
Similar to this via structure, the through-hole coaxial connector also has impedance discontinuity, and this solution is the same as the through-hole Common methods to reduce the impedance discontinuity of through-hole coaxial connectors include using a diskless process, an appropriate lead out method, and optimizing the diameter of the wear pad on the PCB
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