As can be seen from the figure above, the first error is to measure the differential voltage Rshunt through the resistance. It can be seen that the Rshunt to R2 line is shorter, so its resistance is smaller than that of Rshunt to R1. This difference in line impedance may introduce input bias current into the INA, resulting in a differential voltage on the U1 input side. Since the INA's task is to amplify the differential voltage, unbalanced circuitson the input side can cause errors. Therefore, you need to ensure that the INA input lines are balanced and as short as possible.
The second error is related to the INA gain setting resistor Rgain. The length of the U1 pin to the Rgain pad is longer than it needs to be, resulting in additional resistance and capacitance. Since the gain depends on the resistance between the INA gain setting pin, pin 1, and pin 8, additional resistance can bring the wrong target gain. Since the gain setting pins of the INA are connected to the feedback portion in the INA, additional capacitance can cause stability problems. Therefore, make sure that the line connecting the gain setting resistance is as short as possible.
Then, it may be necessary to improve the position of the buffer circuit reference pins. The reference pin buffer circuit is away from the reference pin, which may increase the resistance of the reference pin, causing noise or other signals to be coupled into the line. The additional resistance on the reference pin may reduce the high common-mode rejection ratio (CMRR) provided by most InAs. Therefore, the reference pin buffer circuit should be placed as close to the INA reference pin as possible.
Correct these three errors after the layout.
You can see that R1 and R2 have the same length of wire to the shunt resistor, and Kelvin connections are used. INA pin gain setting resistance as short as possible, reference buffer circuit as close as possible to the reference pin.
If you want to lay out PCBS for INA in the future, be sure to follow these guidelines:
1. Ensure that all lines at the input end are completely balanced;
2. Reduce the line length and minimize the capacitance on the gain setting pin;
3. Arrange the reference buffer circuit as close to the INA reference pin as possible;
4, decoupling capacitor as close as possible to the power supply pin layout;
5. Cover at least one layer of solid ground plane;
6. Do not sacrifice good layout for electronic components using silk screen printing;
7. Follow the guidelines outlined in the first part of this article.
At first glance, this seems counterintuitive. You would think a thinner board would provide better conduction away from the components, so why use a thicker board? In fact, when non-standard plate thickness is used, the in-surface thermal resistance will be lower and the thermal mass of the plate will be higher. Thicker boards (2 or 3 mm) can also provide greater mechanical support for larger components in high-current boards, especially on-board inductors and large radiators.
ESD and security
This part of DC presents its own set of problems, especially in power systems, and especially in designs that operate at both high voltages and high currents. To learn more about ESD protection in power systems that operate at high voltage, read the guide to common ESD circuit designs.
Resist does not need to be dried prior to imaging.
The panel can still be treated because the resist coating has been protected by a layer of mylar film. The resist is first coated onto the polyester reel and then directly laminated onto the copper sheet, thereby leaving the protective polyester carrier on the resist transfer coating.
After laminating, the panel is "monolithic" to separate it from the carrier fibre network. The panel can then be exposed by any method, including DI/LDI.
To complement the new generation of resist, the company has now introduced the Hybrid Coating Unit (CL21 Hybrid Coating Laminate Machine).CL21 makes it easy to handle wet resist and gives PCB manufacturers complete control over the printing process. A roll of polyester fiber is then laminated directly onto the copper sheet, leaving the polyester protective jacket on the resist transfer coating.
After laminating, the panel is "monolithic" to separate it from the carrier fibre network. The split panel can then be exposed by any method, including DI/LDI.
Coating thickness can range from 2 to 30 microns, and thinner resist are ideal for fine line printing. Part number and thickness can be changed in 2-3 minutes. The coating unit can be configured to coat a single - or double-sided panel, fibre-mesh, as an etching or coating resist.
When proprietary liquid resist is used in conjunction with CL coater, the intent is to save PCB manufacturers significant time and money, as well as improve the quality of the final product and reduce defects.