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PCB inner layer design
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PCB inner layer design

                                                                          PCB inner layer design

A very important advantage of multi-layer boards over ordinary double-layer boards and single-layer boards is that signal lines and power supplies can be distributed on different board layers to improve signal isolation and anti-interference performance. The inner electrical layer is a copper film layer. The copper film is divided into several isolated areas. The copper film in each area is connected to a specific power supply or ground wire through a via hole, thereby simplifying the wiring of the power supply and ground network. At the same time, it can effectively reduce the internal resistance of the power supply.

1.1 Related settings of internal electrical layer design

The inner electrical layer is usually a whole piece of copper film, and the pad with the same network name as the copper film will be automatically connected to the copper film when it passes through the inner electrical layer. The connection form of the pad/via to the internal electrical layer and the safety spacing of the copper film and other pads that do not belong to the network can be set in the Power Plane Clearance option. Select the [Design]/[Rules…] command, click the Manufacturing option, and the Power Plane Clearance and Power Plane Connect Style options are related to the internal electrical layer, and their contents are introduced as follows.

1. Power Plane Clearance

This rule is used to set the safe spacing of the inner electrical layer, mainly referring to the safe spacing between the pads and vias that have no network connection with the inner electrical layer and the inner electrical layer, as shown in Figure 11-11. During manufacturing, the copper film around the pads that have no network connection with the internal electrical layer will be corroded when passing through the internal electrical layer, and the size of the corroded ring is the value set in the constraint.

2. Power Plane Connect Style

This rule is used to set the form of pads and inner layers. It mainly refers to the form when the pads and vias connected to the internal electrical layer are connected to the internal electrical layer. As shown in Figure 11-12.

Click the Properties button to pop up the rule setting dialog box, as shown in Figure 11-13. The scope of application of the rule is displayed on the left side of the dialog box, and the connection mode can be selected in the Rule Attributes drop-down list on the right side: Relief Connect, Direct Connect and No connect. Direct Connect is a direct connection, the pad does not corrode the surrounding copper film when it passes through the inner layer, and the pad is directly connected to the inner layer copper film; No connect means no connection, that is, the solder with the same name as the copper film network The disk will not be connected to the internal electrical layer; designers generally use the system’s default Relief Connect connection form, and the setting dialog box for this rule is shown in Figure 11-13.

This pad connection form maintains connection with the inner electrical layer through conductor expansion and insulation gaps, where the width of the conductor exit is set in the Conductor Width option; the number of conductor exits is selected in the Conductors option, and 2 or 4 can be selected; the Expansion option Set the width of the conductor extension in the option; set the width of the insulation gap in the Air-Gap option.

1.2 Inner Electric Layer Segmentation Method

In the previous sections of this chapter, the selection of the stacked structure of the multilayer board, the establishment of the internal electrical layer and related settings have been introduced. In this section, the method and steps of dividing the internal electrical layer of the multilayer board will be mainly introduced for readers’ reference. .

(1) Before dividing the inner electrical layer, it is first necessary to define an inner electrical layer, which has been introduced in the previous chapter, and will not be repeated here. Select【Design】/【Split Planes...】command, and the internal electrical layer split dialog box will pop up as shown in Figure 11-14. The Current split planes column in this dialog box refers to the area where the inner layer has been split. In this example, the inner layer has not been split, so the Current split planes column shown in Figure 11-14 is blank. The Add, Edit, and Delete buttons under the Current split planes column are used to add a new power area, edit the selected network and delete the selected network respectively. The Show Selected Split Plane View option below the button is used to set whether to display the schematic diagram of the currently selected inner layer split area. If this option is selected, a thumbnail of the network area divided by this area in the inner layer will be displayed in the box below it, and the pin, pad or connection with the same name as the inner layer network will be highlighted in the thumbnail If you do not select this option, it will not be highlighted. Show Net For option, select this option, if a network has been assigned to the internal electrical layer when defining the internal electrical layer, then the connection and pin situation with the same name as the network will be displayed in the box above this option.

(2) Click the Add button to pop up the inner electric layer segmentation setting dialog box as shown in Figure 11-15.

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In the dialog box shown in Figure 11-15, Track Width is used to set the line width when drawing the border, and it is also the insulation distance between different network areas on the same internal electrical layer, so the Track Width is usually set relatively large . Readers are advised to also enter units when entering values. If only a number is entered here without a unit, the system will use the unit in the current PCB editor by default.

The Layer option is used to set the internal electrical layer of the specified division, here you can choose Power and GND internal electrical layers. In this example, there are multiple voltage levels, so it is necessary to divide the Power inner layer to provide different levels of voltage for components.

The Connect to Net option is used to specify the network connected to the divided area. Usually the inner layer is used for power supply and ground network layout, but it can be seen from the Connect to Net drop-down list that the entire network of the inner layer can be connected to the signal network for signal transmission, but the general designer does not handle it this way . The signal voltage and current required by the signal are weak, and the wire requirements are small, while the power supply current is large, and a smaller equivalent internal resistance is required. Therefore, the general signal is routed on the signal layer, and the inner layer is dedicated to the power and ground network connections.

(3) Click the OK button in Figure 11-15 Inner Electric Layer Segmentation Settings dialog box to enter the state of drawing the border of the network area.

When drawing the frame of the internal electrical layer, the user generally hides the information of other layers, and only displays the currently edited internal electrical layer, which is convenient for drawing the frame. Select 【Tools】/【Preferences...】command, and the dialog box shown in Figure 11-16 will pop up. Select the Display option, and then select the Single Layer Mode check box, as shown in Figure 11-16. In this way, except the current working layer Power, other layers are hidden, and the display effect is shown in Figure 11-17.

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