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Detailed explanation on the need to use core vias in PCB design
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Detailed explanation on the need to use core vias in PCB design

Detailed explanation on the need to use core vias in PCB design

A popular way to solve the problem of high-density interconnection (HDI) is to start with a simple printed circuit board and then add it layer by layer. This is known as the sequential lamination process. To balance, layers are always added to the top and bottom in pairs. We have a symbol to describe the sequence.

A typical example is a board that starts with N layers in the initial pressing and then has three additional laminating steps. Each additional suppression will add two layers, one above the previous step and one below the previous step. The abbreviation of this structure is 3+N+3 or simple 3N3 stack.

We can get more detailed information and replace N with the actual number of layers during the first pressing and call it, for example, a 3+4+3 board, or even ten layers. In fact, manufacturers are more concerned about how many layers are added later than how many layers are used in the first step.

These three are not random numbers. Wafer factories catering to HDI market take 3N3 board as their best choice. So how do you adjust the factory to build a specific stack? It's equipment. When the chemical processes complete their work, the panels will briefly pass through the etch and plating bath. Drilling, especially mechanical drilling, is slower than other batch processes such as screen printing.

Therefore, for each plating line, there are four drilling rigs and one printer. In between are some of the most expensive equipment in the factory. These items will be printing presses. Or, perhaps in the case of smaller stores, news. News is the bottleneck. This is the main reason why sequential builds take longer and cost more. Arrange to visit local suppliers. The ratio of the press to the drilling station will indicate whether they focus on through-hole plates or high-density plates.

Printing plants with sufficient bandwidth can deliver on 3N3 boards while maintaining the capacity of other parts of the plant. This level of technology is sufficient for most applications. Smartphones require a stack of micro vias that run through the entire circuit board. This is their chipset and tightly packaged function to make way for the battery. Their factory workshops will reflect these needs.

The core of the problem - starting from the through-hole

In addition to the lack of solder mask and silk screen, the "simple board" is complete. The core will have at least two layers, but usually more. We talk about core and prepreg, but this is slightly different from the definition of "core". Our core can be two layers, in which case there will be overlapping definitions. Even if it is a core plus an additional prepreg layer, we will still call it a core. If the design requires, the final core through-hole will be a hole that passes through the stack of multiple core materials. In this case, the core is the product of the first lamination cycle.

The material of this initial building block can be glass braid for a completely rigid structure, or polyimide for a rigid/flexible scene. In any case, the mechanical holes in the magnetic core are filled with resins, which form the space between the glass fibers in the circuit board dielectric. After filling, they are covered with copper, and then the sequence lamination can be started.

circuit board

Extrude more from the core hole

The fact that the core through-hole starts from the through-hole is emphasized. The same electroplating process is required to deposit copper in the hole. This translates into the use of larger minimum air gaps and linewidths consistent with outer and typical inner layer constraints.

Knowing that thicker copper favors wider geometries, it makes sense to dedicate these layers to power and ground networks, which also happen to benefit from thicker copper and wider geometries. Naturally, the middle layer is a candidate for thin wire cabling.

When the number of floors becomes busy, there must be multiple sub boards stacked together. From the perspective of routing, the core via span is more like a local elevator. Grouping the bus and related power domains into dedicated parts will reduce cross contamination on these epic high-level boards.

If the core is stacked in multiple layers, you can create some micro vias in the core before adding the first pair of additional layers in order. You only need to use a thin dielectric on the outer layer to make a micro through-hole. You will get a micro via that will not increase the lamination cycle. It's like change!

If you like money, you should avoid trying to stack micro vias in the same location as the core vias. This is one of the most serious DFM violations. The exact distance between the core through-hole and the adjacent micro through-hole will vary. I guess if you ask around, the preferred result is that the span between the two vias is equivalent to the air gap of different networks. Normal through-hole to through-hole spacing with the same network spacing provides suppliers with a broad path to success.

In some cases, this kind of thinking will leave you at a loss. Many chips are not made for low-key circuit boards. Pushing it to the limit of the same network via spacing is to make the capture pads of the blind hole/buried hole and the core via tangent to each other; Contact but not overlap.

Be careful to overuse the transition layer. It will be busy with snowman shaped hole pairs, so it is easy to squeeze them together. Space under thin pitch ball grid array (BGA) devices can be valuable, so it is best to minimize their use under the device to those connections that pass through the circuit board, such as bypass caps or other compelling reasons. Wire away from the device on the layer accessible through the micro via, and then jump through the larger via, where there is more space for them to use.

Stitch vias for strong return paths and EMI suppression

The tendency to return paths will involve many locations with grounded via patterns. The earlier you understand these details, the easier it will be to implement them. Provision shall be made for connecting various reference planes wherever the routing passes the transition.

You may need to create a thermal path through the board. Consider leaving some dielectric materials to maintain a certain degree of impedance and structural integrity. Start from the concentration around the source, but disperse as the through-hole is connected to the other side of the circuit board. I've never done this before, but I don't understand why you can't increase the dissipation factor by using thermal paste as filler.

Any type of through-hole line will produce grooves on the plane. Sometimes you get stuck and have to do so. In these cases, a little effort is sufficient to divide the slot into two smaller slots. The degree of freedom of movement of the core through-hole is better than that of the through-hole fixed on a specific pin. Staggering their explosive modes helps to avoid magnetic coupling. The vias are happy when they have their own gaps when crossing the plane. Of course, the AKA differential pair is an exception for married couples.

So you have it. The core vias are part of the sequential assembly plate foundation. Their use means that one or more layers of embedded holes and blind holes will be mixed. This is a combination to solve most HDI routing researches. The cost of having one core through-hole is the same as that of having multiple core through-holes. Therefore, if you are already on that path, you should continue to work hard. The circuit board assembly and circuit board processing manufacturers explain the use of core vias in circuit board design.

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