PCB design: should you route signals in the PCB power plane?

PCB design: should you route signals in the PCB power plane?

Once again, we have a good example that a long-standing pcb design guide does not have enough background. The short answer to this question is "Yes", which can be done in some cases. This is a common practice. We do this on the client board. These products do not have any impedance problems, EMC problems or DC power loss, because the stack design is correct, and because we have considered how to correctly wire the design. However, when routing signals on the power layer or power rails on the signal layer, multiple dimensions need to be considered. Difficulties arise from consideration of power integrity, controlled impedance, and DC power distribution in the circuit board.

How to route signal in PCB power plane layer

Before starting to cut the power plane layer of PCB with wiring, you need to consider the following design requirements:

Power plane current capacity

Low speed and high speed signal and impedance

If the plane is used as a reference layer, return the path

Let's look at each area in more detail.

Power plane current capacity

Whenever you design a power plane, it has some defined current carrying capacity, which is related to the size of the copper that makes up the plane layer. If you start wiring through the high power plane, you will divide the plane into multiple parts, and the current capacity of each part will be lower than the unified plane layer. In addition, if the shape of your power layer is very complex, you may eventually create a funnel with a high current density, which will become very hot. You can visualize this effect in the PDN analyzer simulation. PCB assembly and PCB processing manufacturer explained: PCB design: should you route signals in the PCB power plane?

This area in the high current power plane can act as a blocking point with a lower current capacity.

One solution to compensate for cabling in the power layer is to use another power plane running in parallel on adjacent layers. In this arrangement, you are actually shunting the current to two parallel planes, which will help ensure that you do not exceed the current capacity of any part of the plane. For most low-power devices, you usually don't need to worry about this. However, if you have a high power system, you may need to do this anyway, so that the system can provide enough power without getting too hot. A common example is a backplane (3U/6U) or other rack mount unit.

Tracking impedance

If you do not wire the controlled impedance wire through the copper clad cloth on the power layer, you need not worry too much about this. As long as you follow the other guidelines in this list (if applicable), low speed digital protocols such as SPI and I2C and GPIO can be routed through copper coating without problems. High speed protocols where impedance is important are another matter, and you need to ensure that there is sufficient copper clad clearance around these traces to ensure that impedance targets are not violated. If your power injection is too close to your routing, you need to use coplanar calculation in the layer stack to ensure that you do not violate impedance tolerance.

In this example, I have cleared the power layer, because it is easier to make room for cabling in this layer. Please note that I also ignored the copper in the large central area, because it does not provide any useful functions due to the regular clearance of the board.

The danger involved in cutting planes through the application of high clearance is that the copper will eventually be cut into too many parts. If there are too many wires, a large amount of residual copper will be left around the layout, and the copper will be cut into small pieces. For low layer boards that also require impedance control, you may not have another power layer to reconnect all these parts. If you find that you have to route a lot of wires through the power layer, it is better to add two more layers (power layer and ground layer).

Return Path

As with wiring in any other case, make sure that the signal in the PCB has a well-defined return path, especially when wiring the power layer. The problem here is if you route in adjacent layers. When you route in the same layer as the power area, you place gaps in the reference plane. For the power area, this is usually fine unless you use the power area as a reference for another layer of signals. Then, if you happen to pass through one of these gaps, an area with a higher parasitic inductance is created, and then more EMI can be received from crosstalk or external sources.

For low-speed protocols that propagate between two plane layers, as long as the plane in the other layer is uniform, you can route through the split power plane. The impedance discontinuity you create will be electrically short, so you don't have to worry about reflection, and the presence of a plane on another layer helps ensure that there is still a clear return path, even though the inductance in this area is high as the aircraft splits. For higher speed signals, this is more important. You'd better add a new layer to make room for these signals rather than cut off the power layer.

generalization

In conclusion, if you operate with low speed digital signals that do not require impedance control, I will not worry too much about the wiring in the copper clad power supply. Please pay attention to the current path around the power layer and try not to cut the power layer into islands. In other cases, you should use additional layers and route them there. In addition, please pay attention to impedance requirements when necessary: copper placed too close to the stripline or microstrip line will cause impedance deviation, ensure there is another reference plane nearby, and avoid wiring through the gap of adjacent layers. PCB assembly and PCB processing manufacturer explained: PCB design: should you route signals in the PCB power plane?