For modern plate design, the concept of PCB mixed signal relatively vague, because even in pure "digital" devICes, there are still analog circuits and analog effects. Therefore, in the early stage of design, in order to reliably achieve strict timing allocation, it is necessary to SIMulate the simulation effect. In fact, in addition to the reliability of communication products that must have trouble free continuous operation for several years, simulation effects are particularly needed in mass produced low-cost/high-performance consumer products.
Another difficulty in modern mixed signal PCB design is that there are more and more devices with different digital logic, such as GTL, LVTTL, LVCMOS and LVDS logic. The logic threshold and voltage swing of each logic circuit are different. However, these circuits with different logic threshold and voltage swing must be designed on one PCB together. Here, you can master successful strategies and technologies by thoroughly analyzing the layout and wiring design of high-density, high-performance, mixed signal PCBs.
Basis of Mixed Signal Circuit Wiring
When digital and analog circuits share the same components on the same board, the layout and wiring of circuits must pay attention to methods. The matrix shown in Figure 1 is helpful for the design planning of mixed signal PCB. Only by revealing the characteristics of digital and analog circuits can the required PCB design goals be achieved in the actual layout and wiring.
In the mixed signal PCB design, there are special requirements for power supply wiring and the analog noise and digital circuit noise are required to be isolated from each other to avoid noise coupling, which increases the complexity of layout and wiring. The special requirements for power transmission lines and isolation of noise coupling between analog and digital circuits further increase the complexity of mixed signal PCB layout and routing.
If the power supply of the analog amplifier in the A/D converter and the digital power supply of the A/D converter are connected together, it is likely to cause the interaction between the analog part and the digital part of the circuit. Perhaps, due to the location of the I/O connectors, the layout must mix the wiring of the digital and analog circuits.
Before layout and wiring, the engineer should understand the basic weaknesses of the layout and wiring scheme. Even with false judgments, most engineers tend to use layout and wiring information to identify potential electrical impacts.
Layout and wiring of modern mixed signal PCB
The layout and wiring technology of mixed signal PCB will be described below through the design of OC48 interface card. OC48 represents the optical carrier standard 48, which basically communicates to 2.5Gb serial optical. It is one of the high-capacity optical communication standards in modern communication equipment. The OC48 interface card contains several typical mixed signal PCB layout and wiring problems, and its layout and wiring process will indicate the order and steps to solve the mixed signal PCB layout scheme.
The OC48 card includes an optical transceiver for bidirectional conversion of optical signals and analog electrical signals. Analog signals are input or output to digital signal processors. DSP converts these analog signals into digital logic levels, so that they can be connected to microprocessors, programmable gate arrays, and the system interface circuits of DSP and microprocessors on the OC48 card. The independent phase-locked loop, power filter and local reference voltage source are also integrated.
Among them, the microprocessor is a multi power supply device, the main power supply is 2V, and the 3.3V I/O signal power supply is shared by other digital devices on the board. Independent digital clock source provides clock for OC48 I/O, microprocessor and system I/O.
After checking the layout and wiring requirements of different functional circuit blocks, it is preliminarily recommended to use 12 layers of boards, as shown in Figure 3. The configuration of microstrip and stripline layers can safely reduce the coupling of adjacent routing layers and improve impedance control. The ground plane is set between the first layer and the second layer to isolate the wiring of sensitive analog reference source, CPU core and PLL filter power supply from the microprocessor and DSP devices on the first layer. The power supply and ground plane always appear in pairs, the same as what is done on the OC48 card to share the 3.3V power plane. This will reduce the impedance between the power supply and the ground, thereby reducing the noise on the power signal.
Avoid running digital clock line and high-frequency analog signal line near the power layer, otherwise, the noise of the power signal will be coupLED to the sensitive analog signal.
Shape and simplify the PCB manufacturing process. Because 1 ounce copper clad plate has strong resistance to large current, 1 ounce copper clad plate shall be used for 3.3V power supply layer and corresponding grounding layer, and 0.5 ounce copper clad plate can be used for other layers, which can reduce the voltage fluctuation caused by transient high current or SPIke.
If you design a complex system from the ground plane up, 0.093 inch and 0.100 inch thick cards should be used to support the wiring layer and the ground isolation layer. The thickness of the card must also be adjusted according to the wiring feature size of via pads and holes, so that the width to height ratio of the drilling diameter to the thickness of the finished card does not exceed the width to height ratio of the metallized hole provided by the manufacturer.
If you want to design a low-cost, high-yield commercial product with the least number of wiring layers, you should carefully consider the wiring details of all special power supplies on the mixed signal PCB before layout or wiring. Before starting the layout and cabling, ask the target manufacturer to review the preliminary layering scheme. Basically, the lamination shall be based on the thickness, number of layers, weight of copper, impedance (with tolerance) and minimum via pad and hole size of the finished product. The manufacturer shall provide lamination suggestions in writing.
Examples of configurations of all controlled impedance striplines and microstrip lines should be included in the recommendations. Combine your impedance predictions with the manufacturer's impedance predictions. Then, use these impedance predictions to verify the signal routing characteristics in the simulation tool used to develop CAD routing rules.
Layout of OC48 card
The high-speed analog signal between optical transceiver and DSP is very sensitive to external noise. Similarly, all special power supply and reference voltage circuits also cause a lot of coupling between the analog and digital power transmission circuits of the card. Sometimes, due to the limitation of the shell shape, it is necessary to design high-density boards. Due to the high orientation of the external optical cable access card and the high size of some components of the optical transceiver, the position of the transceiver in the card is largely fixed. The system I/O connector location and signal distribution are also fixed. This is the basic work that must be completed before layout.
As with most successful high-density simulation layouts and routing schemes, layout and routing requirements must be taken into account to meet the requirements of routing. The method of "layout before wiring" is not recommended for the analog part of a mixed signal PCB and the local CPU core with 2V working voltage. For OC48 card, the part of DSP analog circuit containing analog reference voltage and analog power bypass capacitor shall be wired interactively first. After the wiring is completed, the entire DSP with analog components and wiring shall be placed close enough to the optical transceiver to fully ensure that the wiring length from high-speed analog differential signal to DSP is the shortest, with the least bending and vias. The symmetry of differential placement and routing will reduce the influence of common mode noise. However, it is difficult to predict the optimal layout before routing.
Consult the chip distributor for PCB layout design guidelines. Before designing according to the guidelines, fully communicate with the application engineers of the distributors. Many chip distributors have strict time limits for providing high-quality cloth board suggestions. Sometimes, the solutions they provide are feasible for "first class customers" using the device. In the field of signal integrity (SI) design, the signal integrity design of new devices is particularly important. According to the basic guidelines of the distributor and in combination with the specific requirements of each power supply and ground pin in the package, you can start to lay out and wire the OC48 card integrated with DSP and microprocessor.
After the location and wiring of the high-frequency analog part are determined, the rest of the digital circuits can be placed according to the grouping method shown in the block diagram. The following circuits shall be carefully designed: the position of PLL power filter circuit in CPU with high sensitivity to analog signals; Local CPU core voltage regulator; Reference voltage circuit for "digital" microprocessors.
The electrical and manufacturing criteria of digital wiring can be properly applied to the design at this time. The aforementioned design of signal integrity for high-speed digital bus and clock signal reveals some special wiring topology requirements for delay matching of processor bus, balanced Ts and some clock signal wiring. However, you may not know that some people have put forward an updated proposal, that is, to add a number of termination resistors.
In the process of solving problems, it is natural to make some adjustments in the layout stage. However, before starting the routing, it is important to verify the timing of the digital part according to the layout scheme. At this moment, a complete DFM/DFT layout review of the board will help ensure that the card meets the customer's needs.
Digital cabling of OC48 card
For the power line of digital devices and the digital part of mixed signal DSP, the digital wiring should start from the escape patterns of SMD. The shortest and widest printed wire allowed by the assembly process shall be used. For high-frequency devices, the printed wiring of the power supply is equivalent to a SMAll inductance, which will deteriorate the power supply noise and cause unexpected coupling between analog and digital circuits. The longer the power supply printed wire, the greater the inductance.
The best layout and wiring scheme can be obtained by using digital bypass capacitor. In short, fine tune the position of the bypass capacitor as required, so that it can be installed conveniently and distributed around the digital part and the digital part of the mixed signal device. The same "shortest and widest routing" method shall be used to route the bypass capacitor outlet diagram.
When the power supply branch passes through a continuous plane (such as the 3.3V power layer on the OC48 interface card), the power supply pin and the bypass capacitor do not have to share the same export map, and the lowest inductance and ESR bypass can be obtained. On mixed signal PCB such as OC48 interface card, pay special attention to the wiring of power branch. Remember to place additional bypass capacitors in a matrix arrangement on the entire card, even near passive components.
After the power outlet diagram is determined, automatic wiring can be started. ATE test contact on OC48 card shall be defined during logIC design. Make sure that ATE contacts 100% of the nodes. In order to achieve ATE test with a minimum ATE test probe of 0.070 inch, the position of the breakout via must be reserved to ensure that the power layer will not be intersected by the antipads on the opposite side of the via.
If a power and ground plane opening (split) scheme is to be adopted, the layer bias shall be selected on the adjacent wiring layer parallel to the opening. On the adjacent layer, define the no wiring area according to the perimeter of the opening area to prevent wiring from entering. If the wiring must pass through the opening area to another layer, ensure that the other layer adjacent to the wiring is a continuous ground plane. This reduces the reflection path. It is good for some digital signal distribution boards to let the bypass capacitor cross the open power layer, but it is not recommended to bridge between the digital and analog power layers, because the noise will be coupled through the bypass capacitor.
Several of the latest automatic routing applications can route high-density multilayer digital circuits. In the preliminary wiring stage, 0.050 inch large size vias spacing shall be used in the SMD outlet and the package type used shall be considered. In the subsequent wiring stage, the vias shall be allowed to be close to each other, so that all tools can achieve the highest routing rate and the lowest number of vias. Because the OC48 processor bus adopts an improved star topology, it has the highest priority in automatic routing.
After the completion of OC48 card layout board, signal integrity check and timing simulation shall be carried out. The simulation shows that the routing guidance meets the expected requirements and improves the timing index of the Layer 2 bus. At last, check the design rules, recheck the final manufacturing, mask and recheck, and sign and issue to the PCB manufacturer, then the board layout task is officially ended.