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Engineering Technology
Engineering Technology
Methods of PCB design for antistatic release (ESD)
14May
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Methods of PCB design for antistatic release (ESD)

Static electricity from the human body, the environment and even inside electronic equipment can cause various damage to the precision semiconductor chip, such as penetrating the thin insulation layer inside the component; Destroy the grids of MOSFET and CMOS components; Trigger locking in CMOS devices; PN junction with short circuit reverse bias; PN junction with short circuit forward bias; Melt the welded wire or aluminum wire inside the active device. In order to eliminate electrostatic discharge (ESD) interference and damage to electronic equipment, it is necessary to take a variety of technical measures to prevent.

 

In PCB design, PCB anti-ESD design can be achieved through layering, proper layout and wiring and installation. During the design process, most design modifications can be limited to adding or subtracting components through prediction. The PCB layout and wiring can be adjusted to prevent ESD. Here are some common precautions.


▪ Use multilayer PCBS where possible. Ground plane and power plane, as well as closely spaced signal wire-ground spacing reduce common-mode impedance and inductive coupling to 1/10 to 1/100 of double-sided PCB's compared to double-sided PCB's. Try to place each signal layer next to a power layer or ground layer. For high density PCBS with components on both top and bottom surfaces, with very short connection lines and many padding places, consider using inner lines.


▪ For double-sided PCBS, use a tightly interwoven power supply and grid. The power cord is next to the ground wire, between the vertical and horizontal lines or filling areas, and should be connected as much as possible. One side of the grid should be less than or equal to 60mm and, if possible, less than 13mm.

▪ Make sure each circuit is as compact as possible.

▪ Put all connectors aside if possible.

▪ If possible, introduce the power cord from the center of the card and away from areas that are directly affected by ESD.


▪ Place wide chassis floors or polygonal filler floors on all PCB layers under the connectors leading out of the chassis (which are susceptible to direct ESD damage) and connect them together with holes at approximately 13mm intervals.

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▪ Place mounting holes on the edge of the card. Attach the top and bottom pads of free flux around the mounting holes to the floor of the case.

▪ When assembling PCB, do not apply any solder to the top or bottom pad. Use screws with built-in washers to achieve tight contact between the PCB and the metal case/shield or ground surface bracket.


▪ Set up the same "isolation zone" between the chassis floor and the circuit floor on each floor; If possible, keep the spacing at 0.64mm.


▪ Connect the chassis floor and the circuit floor with 1.27mm wide wires along the chassis ground wire every 100mm at the top and bottom of the card near the mounting holes. Adjacent to these connection points, a pad or mounting hole for mounting is placed between the case ground and the circuit ground. These ground connections can be cut open with a blade to keep the circuit open, or a jump with a magnetic bead/high frequency capacitor.

▪ If the circuit board will not be placed in a metal case or shield device, do not apply solder resistance to the top and bottom case grounding wires of the circuit board, so that they can be used as ESD arc discharge electrode.


▪ Set up a ring around the circuit in the following ways:

(1) In addition to the edge connector and chassis floor, the entire XXX around the ring path.

(2) Ensure that the annular ground width of all layers is greater than 2.5mm.

(3) Connect the rings with holes every 13mm.

(4) Connect the ring ground to the common ground of the multilayer circuit.

(5) For the double panel installed in the metal case or shielding device, the ring should be connected with the circuit common ground. An unshielded double-sided circuit should be connected to the ring floor. The ring floor should not be coated with solder resistance so that the ring can act as an ESD discharge rod. A gap of at least 0.5mm wide should be placed somewhere on the ring floor (all layers) to avoid forming a large loop. The distance between signal wiring and ring ground should not be less than 0.5mm.


▪ A ground line should be placed near each signal line in an area that can be directly hit by an ESD.

▪I/O circuits should be as close to the corresponding connector as possible.

ESD sensitive circuits should be placed close to the center of the circuit so that other circuits can provide some shielding.

▪ A series of resistors and magnetic beads is usually placed at the receiver end. For cable drivers that are vulnerable to ESD damage, a series of resistors or magnetic beads may also be considered at the driver end.

▪ A transient protector is usually placed at the receiving end. Connect a short, thick wire (less than 5 times the width, preferably less than 3 times the width) to the chassis floor. The signal wire and ground wire from the connector are connected directly to the transient protector before being connected to the rest of the circuit.

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