(I) Challenges in electronic system design
With the large-scale improvement of the complexity and integration of system design, electronic system designers are engaged in more than 100MHZ circuit design, the bus frequency has reached or exceeded 50MHZ, some even more than 100MHZ. About 50 percent of current designs have a clock frequency greater than 50 MHZ, and nearly 20 percent have a master frequency greater than 120MHz.
When the system operates at 50MHz, transmission line effects and signal integrity problems will occur. When the system clock reaches 120MHz, PCBS designed based on traditional methods will not work unless knowledge of high-speed circuit design is used. Therefore, high speed circuit design technology has become the electronic system designers must take the design means. The controllability of the design process can only be achieved by using the design techniques of high speed circuit designers.
(II) What is high-speed circuit
It is generally believed that if the frequency of a digital logic circuit reaches or exceeds 45MHZ~50MHZ, and the circuit working on this frequency has accounted for a certain portion of the whole electronic system (for example, 1/3), it is called a high-speed circuit.
In fact, the harmonic frequency of the edge of the signal is higher than the frequency of the signal itself. It is the rising and falling edge of the signal changing rapidly (or the jump of the signal) that causes the unexpected result of the signal transmission. Therefore, it is generally agreed that if the line propagation delay is greater than 1/2 rise time of the driving end of the digital signal, such signals are considered to be high-speed signals and produce transmission line effect.
The transmission of the signal occurs at the moment when the state of the signal changes, such as the time of rise or fall. The signal takes a fixed period of time from the driver to the receiver, and if the transmission time is less than 1/2 of the rise or fall time, then the reflected signal from the receiver will reach the driver before the signal changes state. Conversely, the reflected signal will reach the driver after the signal changes state. If the reflected signal is strong, the superimposed waveform may change the logical state.
(3) Determination of high-speed signal
Above, we defined the preconditions for the transmission line effect to occur, but how to know whether the line delay is greater than 1/2 the signal rise time at the drive end? In general, the typical value of the signal rise time can be given through the device manual, while the signal travel time is determined by the actual wiring length in the PCB design. The following diagram shows the correspondence between signal rise time and allowable wiring length (delay).
The delay per unit inch on PCB board is 0.167ns.. However, if there are more holes, more device pins, and more constraints set on the network cable, the delay will increase. Usually the signal rise time of high speed logic devices is about 0.2ns. If there is a GaAs chip on the board, the maximum wiring length is 7.62mm.
Set Tr as signal rise time and Tpd as signal line propagation delay. If Tr≥4Tpd, the signal falls in the safe zone. If 2Tpd≥Tr≥4Tpd, the signal falls in the region of uncertainty. If Tr≤2Tpd, the signal falls in the problem area. For the signal falling in the uncertain area and problem area, the high-speed wiring method should be used.
What is a transmission line
The wiring on the PCB board can be equivalent to the series and parallel capacitor, resistor and inductor structures shown below. Series resistors typically have values of 0.25-0.55 ohms/foot, and shunt resistors are usually very high because of the insulation. After the parasitic resistance, capacitance and inductance are added to the actual PCB wire, the final impedance on the wire is called the characteristic impedance Zo. The wider the line diameter, the closer to the source/ground, or the higher the dielectric constant of the isolation layer, the smaller the characteristic impedance. If the impedance of the transmission line and the receiver do not match, then the output current signal and the final stable state of the signal will be different. This will cause the signal to reflect at the receiver, and this reflected signal will be sent back to the receiver and back again. As the energy decreases, the amplitude of the reflected signal decreases until the voltage and current of the signal are stabilized. This effect is called oscillation, and the oscillation of the signal is often seen along the rising and falling edges of the signal.
(5) Transmission line effect
Based on the transmission line model defined above, in summary, the transmission line will bring the following effects to the entire circuit design.
5.1 Reflected Signal
If a wire is not terminated correctly (terminal matching), then the signal pulse from the driving end is reflected at the receiving end, causing an unintended effect that distorts the signal profile. When the distortion deformation is very significant, it can lead to a variety of errors, resulting in design failure. At the same time, the distortion distortion signal is more sensitive to noise, which will also cause the design failure. If the above situation is not considered enough, EMI will increase significantly, which will not only affect the design results, but also cause the failure of the entire system. The main reason of reflection signal: too long running; Transmission lines with unmatched terminations, excess capacitance or inductance, and impedance mismatches.