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Engineering Technology
Technical analysis: Ten golden principles of PCB design
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Technical analysis: Ten golden principles of PCB design

1. Control the cable length

Control the length of the wire, as the name implies, that is, short line rules, in PCB design should be controlLED as short as possible, so as not to introduce unnecessary interference due to too long line, especially some important signal lines, such as clock signal line, must be placed in the oscillator close to the devICe. In the case of driving multiple devices, the network topology should be decided according to the specific situation.


2. Avoid forming a self-loop by routing cables

In PCB design, it is necessary to pay attention to the signal line forming a self-loop between different layers. Especially in the multi-layer wiring, the signal line is crossed between each layer, and the self-loop is more likely to form, which will cause radiation interference.


3. Minimum ground loop principle

The ground loop minimum rule means that the ring area formed by the signal line and its loop should be as SMAll as possible. The smaller the ring area is, the less external radiation is, and the less external interference is received. According to this rule, the distribution of the ground plane and important signal routes should be taken into account when the ground plane is segmented to prevent the problems caused by the slotting of the ground plane. In the double-layer Board Design, in the case of leaving enough space for the power supply, the left part should be filled with reference ground, and add some necessary holes, the double-sided signal is effectively connected, for some key signals as far as possible to use ground isolation, for some high frequency design, special consideration of the ground plane signal loop problem, it is recommended to use Multilayer board is appropriate.


4. High speed signal shielding design

Corresponding ground circuit rules, in fact, is also to minimize the loop area of the signal, used for some more important signals, such as clock signals, synchronization signals; For some particularly important, particularly high frequency signals, we should consider the use of copper shaft cable shield structure design, that is, the distribution of the line up and down the left and right ground line isolation, but also consider how to effectively let the shield and the actual plane effectively combined.


5. Avoid the "antenna effect"

Wiring with one end floating in the air is generally not allowed, mainly to avoid the "antenna effect", to reduce unnecessary interference radiation and acceptance, which may bring unpredictable results.


6. Chamfering rule

PCB design should avoid sharp Angle and right Angle, produce unnecessary radiation, at the same time the process performance is not good. The Angle between all lines should be 135°.


7. Avoid overlapping of different power layers

Different power layers should avoid overlapping in space, mainly in order to reduce the interference between different power sources, especially between some power sources with large voltage differences, the overlapping problem of the power plane must be avoided, it is difficult to avoid can consider the interval formation.


8. 3W rule

In order to reduce interference between lines, line spacing should be ensured to be large enough, when the line center distance is not less than 3 times the line width, then 70% electric fields can be maintained without interference with each other, called the 3W rule. If 98% of electric fields do not interfere with each other, the 10W rule can be used.


9. 20H rule

Because the electric field between the power layer and the formation is variable, electromagnetic interference radiates outward at the edge of the plate. It's called the edge effect. The power layer can be shrunk inward so that the electric field is conducted only within the range of the ground. With one H(the thickness of the medium between the power source and the ground) as the unit, if the internal shrinkage of 20H, 70% of the electric field can be limited in the grounding edge; The retraction of 100H can contain 98% of the electric field.


10. Filter capacitor configuration rules (for reference only)

(1) Configuration of high-frequency filter capacitor

Small-scale integrated circuits with less than 10 outputs should be equipped with at least a 100nf filter capacitor when f50MHz. When f50MHz, each power supply pin is equipped with a filter capacitor of 100nf.

For medium - and large-scale integrated circuits, each power supply pin is equipped with a filter capacitor of 100nf. For circuits with large redundancy of power pins, the number of matched capacitors can also be calculated according to the number of output pins, and every 5 outputs is matched with a 100nf filter capacitor.

For areas without active devices, at least one 100nf should be fitted every 6 square centimeters.

For the ultra-high frequency circuit, each power supply pin is equipped with a 1nf filter capacitor. For circuits with large redundancy of power pins, the number of matching capacitors can also be calculated according to the number of output pins, and every 5 outputs is matched with a 1nf filter capacitor.

Special circuit can refer to the filter capacitor recommended by the application manual.

For the circuit or area with a variety of power supplies, each power supply should be equipped with 1, 2 and 3 filter capacitors.

High frequency filter capacitor should be as close as possible to the IC circuit power pin.

The connection between the filter capacitor welding plate and the connecting plate should be 0.3mm thick wire connection, interconnection length should be less than or equal to 1.27mm.

(2) Configuration of low-frequency filter capacitor

(1) Every 5 high-frequency filter capacitors should be equipped with at least one 10μf low-frequency filter capacitor;

Every five 10μf filter capacitors are equipped with at least two 47μf low frequency filter capacitors;

At least one 220μf or 470μf low-frequency filter capacitor should be equipped every 100cm2;

(4) At least two 220μf or 470μf capacitors should be installed around the power outlet of each module. If space permits, increase the number of capacitors.

Low-frequency filter capacitors should be evenly placed around th

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