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What should be paid attention to in the wiring design of multi-layer PCB of EMC technology
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What should be paid attention to in the wiring design of multi-layer PCB of EMC technology

Computer science and technology in PCB industry is a new and comprehensive discipline, whICh mainly studies electromagnetic interference and anti-interference problems in electronic computers. EMI refers to that under the specified electromagnetic environment level, the electronic equipment or system will not reduce its performance index due to electromagnetic interference, at the same time, the electromagnetic radiation generated by itself will not exceed the limit level, and will not affect the normal operation of other systems, so as to achieve the goal that equipment and equipment, systems and systems will not interfere with each other and work together reliably.

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EMI (Electromagnetic Interference) is generated by the electromagnetic interference source transmitting energy to the sensitive system through the coupling path. It includes three basic forms: conductor conduction, common ground wire conduction, space radiation or near-field coupling. The practical application shows that even if the circuit schematic diagram is designed correctly, the improper design of the printed circuit board will also have a negative impact on the reliability of electronic equipment. Therefore, ensuring the electromagnetic compatibility of the printed circuit board is the key to the whole system design. This paper mainly discusses the electromagnetic compatibility technology and its application in the design of multi-layer printed circuit board.

Printed PCB is the supporting component of PCB components and devices in electronic products. It provides the electrical connection between PCB components and devices, and is the most basic component of various Electronic devices. At present, large and very large scale integrated circuits have been widely used in electronic equipment, and the installation density of components on printed boards is increasing, and the transmission speed of signals is getting faster and faster, resulting in increasingly prominent EMC problems. The printed circuit board is divided into single-sided (single-layer board), double-layer (double-layer board) and multilayer PCB. Single board and dual board are usually used for low and medium density wiring and low integration circuits, while multilayer boards use high-density PCB wiring and high integration circuits. Single and double boards are not suitable for high-speed circuits, and single and double side wiring cannot meet the requirements of high-performance circuits. The development of multi-layer wiring technology provides a possibility to solve the above problems, and its applications are increasingly widespread.

Characteristics of multi-layer wiring.

The circuit board is composed of organic and inorganic dielectric materials, and has a multi-layer structure. The layers are connected through vias. The electrical signals between the layers can be conducted by vias coating or filling metal materials. Multilayer PCB wiring has been widely used due to the following characteristics:

A special power supply layer and a ground wire layer are arranged in the Multilayer board. The power layer can be used as a noise source to reduce interference; At the same time, the power layer can provide circuits for all signals of the system to eliminate common impedance coupling interference. Reduce the impedance of the power supply line in the power supply system, so as to reduce the common impedance interference.

(2) The multilayer board adopts a special ground wire layer, and all signal lines have a special ground wire. Characteristics of signal line: stable impedance, good matching, and reduced waveform distortion caused by reflection; The special ground layer is used to increase the distributed capacitance between the signal line and the ground wire and reduce the crosstalk.

Third, the laminated design of PCB.

Wiring rules of pcb board.

The electromagnetic compatibility analysis of multilayer board can be carried out according to Kirchhoff's law and Faraday's law. According to Kirchhoff's law, any time-domain transmission signal from the signal source to the load must have the lowest impedance path.

PCBs with multilayer boards are usually used in high-speed and high-performance systems, where multilayer boards can be used for DC power supply or ground reference plane. Since there are enough layers as power supply or stratum, these planes are usually not divided into solid planes, so it is not necessary to place different DC voltages in the same layer. This layer will act as a current loop and return to the signal on the adjacent transmission line. The primary goal of this planar layer EMC is to build a low impedance current loop.

The signal layers are distributed between the solid layers of the reference plane, and they can be symmetrical striplines or asymmetrical striplines. The structure and layout of the multilayer board are illustrated by taking the 12 layer board as an example. Its hierarchical structure is T-P-S-P-S-P-B, where T is the top layer, P is the reference plane, S is the signal layer, and B is the bottom layer. From top to bottom, there are layers 1, 2,..., and 12. As the upper and lower pads of components, signals cannot be transmitted for a long distance between the upper and lower pads, which can reduce the direct radiation of wiring. Incompatible signal lines shall be isolated from each other to avoid coupling interference. high frequency and low frequency, large current and SMAll current, digital and analog signal lines are incompatible. The incompatible components shall be placed at different positions of the printed board in the component layout, and the signal lines shall still be isolated during the layout. Three problems should be paid attention to in the design:

Decide which reference layer will contain multiple PCB power supply areas for different DC voltages. Assuming that the eleventh layer has multiple DC voltages, the designer must keep the high-speed signal as far away from the tenth layer and the bottom layer as possible, because the loop current cannot pass through the reference plane above the tenth layer, and suture capacitance is required; The third, fifth, seventh and ninth layers are signal layers for high-speed signals. The routing of key signals shall be unidirectional as far as possible, so that the possible number of routing channels can be determined on the optimization layer. The signal routing between layers should be perpendicular to each other, so as to reduce the coupling interference of electric field and magnetic field between lines. The "east-west" routing can be set on the third and seventh layers, and the "north-south" routing can be set on the fifth and ninth layers. Which layer of cloth should be based on the direction of its destination.

(2) Changes in the number of layers during high-speed signal routing, and which layer is used in an independent routing, to ensure that the return current flows from a reference plane to the required new reference plane. This is to reduce the area of the signal loop and the differential mode current radiation and common mode current radiation of the circuit. The radiation intensity of the circuit is proportional to the area of the circuit. In fact, the best design does not need to change the reference plane. It only needs to change one side of the reference plane, and only needs to change it back to the other side. For example, the combination of signal layers can be used as a signal layer pair: the third, fifth, seventh, seventh, ninth, so that wiring combinations can be formed in the east-west and north-south directions. However, the combination of the third and ninth layers cannot be used because it requires the return current to flow from the fourth layer to the eighth layer. Although the decoupling capacitor can be placed near the via, it will lose its function at high frequency due to the existence of lead and via inductance. However, such routing will increase the area of the signal loop and adversely reduce the current radiation.

(3) Select the DC voltage of the reference layer. In this case, the internal signal processing speed of the processor is fast, resulting in a lot of noise from the power/ground reference pins. Therefore, it is important to use decoupling capacitors when providing the same DC voltage to the processor and using decoupling capacitors as efficiently as possible. The best way to reduce the inductance of these components is to connect the wiring as short and wide as possible, and the vias as short and too thick as possible.

When the second layer is allocated as "ground" and the fourth layer is allocated as the power supply of the processor, the farther the vias are, the shorter the top layer and decoupling capacitor of the processor should be. There is no important current at the gap extending to the bottom of the plate, and there is no antenna function in case of short circuit. The reference configurations for the casCADing design layout are listed in Table 1.

20-H rule, 3-W rule.

There are two basic principles to determine the distance between the power supply layer and the board edge of the multilayer PCB capacitor in the capacitance design of the multilayer PCB board, and to solve the distance between the printing strips: the 20-H method and the 3-W method.

20-H principle: RF current usually exists at the edge of the power plane because of the connection between magnetic fluxes. When high-speed digital logic and clock signal are used, RF current is coupLED with each other, as shown in Figure 1. To reduce this effect, the physical size of the power plane should be at least 20H smaller than the physical size closest to the ground plane (H is the distance between the power plane and the ground plane). The edge effect of the power plane generally occurs around 10H. At 20H, about 10% of the magnetic flux is blocked. If 98% of the magnetic flux is to be reached, 100% of the boundary value is required, as shown in Figure 1. The physical distance between the power plane and the nearest grounding plane, including the thickness of the copper clad plate, the prefilled material and the insulating barrier, is determined by the 20-H rule. The resonant frequency of PCB can be increased by using 20-H.

3-W rule: When the distance between two printed lines is small, electromagnetic crosstalk will occur, which will affect the normal operation of related circuits. To avoid this interference, the distance between printed PCB lines should not be less than 3 times, that is, not less than 3W (W is the width of the printed line). The printing line width is related to the line impedance requirements. Too wide affects the wiring density, too narrow affects the signal integrity, and too narrow affects the strength of the transmission terminal. The basic application objects of 3-W principle are clock circuit, differential pair and I/O port PCB wiring. The "3-W principle" SIMply points out the electromagnetic flux boundary with 70% crosstalk energy attenuation. If the requirements are higher, for example, the electromagnetic flux boundary with 98% crosstalk energy attenuation must be 10.

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