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Summary of Ten Defects in PCB Design Process
04Dec
Summer 0 Comments

Summary of Ten Defects in PCB Design Process

1Unclear definition of processing level

The single panel is designed on the TOP layer. If no instructions are given, it may be diffICult to weld the fabricated boards with devices.

2Large area copper foil is too close to the outer frame

The distance between the large area copper foil and the outer frame shall be at least 0.2mm, because it is easy to cause the copper foil to be warped and the solder resist to fall off when milling the shape.

3Draw pads with filler blocks

The pad drawn with filler block can pass DRC inspection when designing the PCB circuit, but it cannot be processed. Therefore, such pads cannot directly generate solder resistance data. When solder resistance is applied, the filler block area will be covered by solder resistance, which leads to difficulty in device welding.


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4The electrical layer is both a mosaic pad and a connection

Because the power supply is designed as a flower pad, the image on the stratum is opposite to that on the actual printed board. All lines are isolation lines. When drawing several groups of power supplies or several types of ground isolation lines, care should be taken not to leave gaps, short PCB circuit two groups of power supplies, or block the connection area.

5Character misplacement

The SMD pad of the character cover pad brings inconvenience to the on-off test of the printed PCB circuit board and component welding. The character design is too SMAll, which makes screen printing difficult, and too large makes characters overlap and difficult to distinguish.

6surface mount device pad too short

This is for on-off test. For a device mounted on a too close surface, the distance between its two pins is quite small, and the pad is also quite thin. When installing the test pin, it must be staggered up and down. If the pad design is too short, it will not affect the device installation, but it will make the test pin stagger.

7Single side pad aperture setting

Single side pads generally do not drill holes. If the holes need to be MARKed, the hole diameter should be designed as zero. If the numerical value is designed, the hole coordinates will appear at this position when the drilling data is generated, which will cause problems. Single side pads such as drilling holes shall be specially marked.

8Pads overlap

In the drilling process, the drill bit will be broken due to multiple drilling at one place, resulting in hole damage. The two holes in the Multilayer board are overlapped, and the negative film is shown as a spacer plate, resulting in scrapping.

9Too many filler blocks or filler blocks filLED with very thin lines in the design

The photo data is lost and incomplete. Because fill blocks are drawn one by one with lines during photo data processing, the amount of photo data generated is quite large, which increases the difficulty of data processing.

10Graphic layer abuse

Some useless connections have been made on some graphic layers, but the original four layer board has been designed with more than five layers of PCB circuits, causing misunderstanding. Violation of conventional design. The graphic layer shall be complete and clear during design.

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