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PCB Design
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  Why should PCB board be covered with copper?
09Feb
Kim 0 Comments

  Why should PCB board be covered with copper?

Copper coating refers to the area without wiring on the PCB board covered with copper foil, connected with the ground wire, in order to increase the ground wire area, reduce the loop area, reduce voltage drop, improve power efficiency and anti-interference ability. Copper coating can not only reduce the ground impedance, but also reduce the cross-sectional area of the loop and enhance the mirror loop of the signal. Therefore, copper coating process plays a very key role in PCB process, incomplete, truncated mirror loop or incorrect position of copper layer often lead to new interference, have a negative impact on the use of the board.

 

DPC substrate preparation process

 

DPC base structure

 

Comparison of copper coating process and thick film process

 

LAM process and DPC process

 

In the LAM process, ceramic metallization uses high energy laser beam to formalize ceramic and metal ions, so that the two are closely combined to achieve the effect of growing together. LAM technology of copper coating, with copper layer thickness controllable, graphic accuracy easy to control and other advantages, Silitong ceramic circuit board copper coating thickness can be customized according to customer requirements between 1μm ~ 1mm, line width, line diameter can do 20μm. That is to say, with the application and deepening of science and technology in the laser field, the copper coating technology of PCB industry has been able to achieve the effect of high bonding degree between ceramic and metal layer and excellent performance through laser technology.

 

In DPC process, electroplating process is adopted. Ceramic metallization generally adopts sputtering process to form adhesion layer with chromium or titanium as material and seed layer with copper as material on ceramic surface successively. Adhesion layer can increase the adhesion strength of metal lines, while copper seed layer plays the role of conductive layer.

 

1, good testability of mechanical contact conditions

Even circuits with very good electrical testability may be difficult to test without considering the basic rules of mechanics. Many factors can limit electrical testability. If the test points are insufficient or too small, it is difficult for the probe bed adapter to reach every node of the circuit. If the position error and size error of the test point are too large, it will cause the problem of poor test repeatability. A series of recommendations regarding the size and positioning of the latching holes and test points should be heeded when using the probe bed dispenser.

 

2. Electrical preconditions for optimum testability

Electrical preconditions are as important to good testability as mechanical contact conditions, and one cannot be without the other. A gate circuit cannot be tested either because it cannot reach the start input through the test point or because the start input is in the encapsulation shell and cannot be contacted externally. In principle, both cases are bad and make the test impossible. In the design of circuits, it should be noted that all components to be tested by on-line testing should have some mechanism that enables the individual components to be electrically insulated. This mechanism can be achieved by disabling the input, which can control the output of the component in a static high ohm state.

 

Although almost all test systems can drive the state of a node to any state by Backdriving, it is better to have a forbidden input for the node involved. First, bring the node to a high ohm state, and then "gently" add the corresponding level.

 pcb

Similarly, the beat generator is always disconnected directly from behind the oscillator via a starter lead, gate circuit, or plug bridge. The starting input must never be connected directly to the circuit, but through a 100 ohm resistor. Each component should have its own start, reset, or control pin. It is necessary to avoid having many components whose startup inputs share a single resistance connected to the circuit. This rule applies to ASIC components, which should also have a lead pin through which the output can be brought to a high ohm state. If the element can be reset when the operating voltage is turned on, it is also very helpful to trigger the reset by the tester. In this case, the component can simply be placed in the specified state before testing.

 

Unused component pins should also be accessible, as undetected short circuits in these areas can also cause component failures. In addition, unused gate circuits are often used for design improvements later, and they may be converted into circuits. So it is also important that they are tested from the start to ensure that their artifacts are reliable.

Just upload Gerber files, BOM files and design files, and the KINGFORD team will provide a complete quotation within 24h.