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66 Common Problems in PCB High Frequency Board Design Part 5
29Nov
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66 Common Problems in PCB High Frequency Board Design Part 5

66 Common Problems in PCB high frequency board design Part 5


PCB manufacturers, PCB designers and PCBA manufacturers explain 66 common problems in PCB high-frequency board design Part V


41. How to reduce EMI problems by arranging the layers of high-frequency PCB boards?

First of all, EMI should be considered from the system perspective. PCB high-frequency boards alone cannot solve the problem. For EMI, I think the main purpose of lamination is to provide the shortest return path of the signal, reduce the coupling area and suppress differential mode interference. In addition, the stratum is tightly coupLED with the power layer, and the proper epitaxy of the power layer is benefICial to the suppression of common mode interference.


42. A system includes dsp and pld. What problems should be paid attention to when wiring?

See the ratio of your signal rate to the length of your wiring. If the time delay of the signal on the transmission line is comparable to the signal change along time, the signal integrity problem should be considered. In addition, the routing topology of multiple DSP, clock and data signals will also affect the signal quality and timing, which needs attention.


PCB boards


43. Why do you want to lay copper?

There are several reasons for copper laying.

1.EMC. For large areas of ground or power supply, copper will play a shielding role, and some special areas, such as PGND, play a protective role.

2. Process requirements for PCB high-frequency board. Generally, to ensure the electroplating effect or the lamination will not deform, copper is paved on the high-frequency PCB board layer with less wiring.

3. Signal integrity requirements: provide a complete return path for high-frequency digital signals, and reduce the wiring of DC network. Of course, there are also reasons such as heat dissipation, copper coating required for installation of special devices, etc.


44. Are there any other good tools besides protel?

As for tools, in addition to PROTEL, there are many wiring tools, such as WG2000, EN2000 series and PowerPCB of MENTOR, Allegro of CADence, cadstar and cr5000 of Zuken, which have their own advantages.


45. What is the "signal return path"?

Signal return path, namely return current. When high-speed digital signals are transmitted, the signal flow direction is from the driver along the PCB transmission line to the load, and then the load returns to the driver side along the shortest path of the ground or power supply. This return signal on the ground or power supply is called the signal return path. Dr. Johson explained in his book that high-frequency signal transmission is actually a process of charging the dielectric capacitor sandwiched between the transmission line and the DC layer. SI analyzes the electromagnetic characteristics of the enclosure and the coupling between them.


46. How to perform SI analysis on plug-ins?

In the IBIS3.2 specification, there is a description of the connector model. EBD model is generally used. For special boards, such as backplanes, SPICE models are required. You can also use the multi board SIMulation software (HYPERLYNX or IS_multiboard) to input the distribution parameters of connectors when building a multi board system, which are generally obtained from the connector manual. Of course, this method is not accurate enough, but it is acceptable.


47. What are the termination methods?

Termination, also known as matching. Generally, there are active end matching and terminal matching according to matching position. The source end matching is generally resistance series matching, and the terminal matching is generally parallel matching. There are many ways, including resistance pull-up, resistance pull-down, Thevenin matching, AC matching, and Schottky diode matching.


48. What factors determine the termination (matching) method?

The matching mode is generally determined by BUFFER characteristics, topology, level type and decision mode, as well as signal duty cycle and system power consumption.


49. Can the IBIS model of the device be used to simulate the logic function of the device? If not, how to conduct board level and system level simulation of circuits?

IBIS model is a behavior level model and cannot be used for functional simulation. SPICE model or other structure level models are required for functional simulation.


50. What are the rules for termination (matching)?

The key of digital circuit is timing problem, and the purpose of adding matching is to improve the signal quality and get the determinable signal at the decision time. For the level effective signal, the signal quality is stable on the premise of ensuring the establishment and retention time; For the delayed effective signal, the signal change delay speed meets the requirements on the premise of ensuring the single modulation of the signal. PCB manufacturers, PCB designers, and PCBA manufacturers will explain 66 common problems in PCB high-frequency Board Design Part 5.

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