When a PCB completes the layout and wiring, and the connectivity and spacing are checked without error, is a PCB completed? The answer, of course, is no. Many beginners, including some experienced engineers, tend to rush things and neglect post inspection due to time constraints, impatience or overconfidence. As a result, there are some very basic BUGs, such as insufficient line width, component label silk screen pressed on the vias, sockets too close, signal loops, etc. As a result, electrical problems or process problems will be caused, and in serious cases, new plates will be made, resulting in waste. Therefore, after a PCB has completed the layout and routing, a very important step is the post inspection.
There are many detailed elements in PCB inspection. I listed some of the most basic and error prone elements for later inspection.
1. Component packaging
(1) Pad spacing. If it is a new device, you should draw the component package yourself to ensure that the spacing is appropriate. The bonding pad spacing directly affects the welding of components.
(2) Size of vias, if any. For plug-in devices, sufficient allowance shall be reserved for the size of vias, and it is generally appropriate to reserve no less than 0.2mm.
(3) Contour silk screen. The outline silk screen of the device should be larger than the actual size to ensure the smooth installation of the device.
(1) The IC should not be close to the plate edge.
(2) Components of the same module circuit shall be placed close to each other. For example, the decoupling capacitor should be close to the power supply pin of the IC, and the components constituting the same functional circuit should be placed in a clear area to ensure the realization of the function.
(3) Arrange the position of the socket according to the actual installation. The sockets are all led to other modules. According to the actual structure and for the convenience of installation, the principle of proximity is generally adopted to arrange the socket position, which is generally close to the board edge.
(4) Pay attention to the direction of the socket. The sockets are directional. If the direction is reversed, the wire will be customized. For the flat plug socket, the direction of the socket should be toward the outside of the board.
(5) Keep Out area cannot have components.
(6) The interference source shall be far away from the sensitive circuit. High speed signal, high speed clock or high current switch signal are all interference sources and should be far away from sensitive circuits, such as reset circuit and analog circuit. They can be separated by paving.
(1) Lineweight size. The line width shall be selected in combination with the process and current carrying capacity, and the minimum line width shall not be less than the minimum line width of the PCB manufacturer. At the same time, the current carrying capacity shall be guaranteed. Generally, the appropriate line width shall be selected with 1mm/A.
(2) Differential signal line. For USB, Ethernet and other differential lines, pay attention to that the lines should be of equal length, parallel and in the same plane, and the spacing is determined by the impedance.
(3) Pay attention to the return path of high-speed lines. High speed lines are prone to generate electromagnetic radiation. If the area formed by the routing path and the return path is too large, a single turn coil will radiate electromagnetic interference outward. Therefore, when routing, pay attention to the return path nearby. The multilayer PCB is equipped with a power layer and a ground plane to effectively solve this problem.
(4) Note the analog signal line. The analog signal line should be separated from the digital signal, and the routing should avoid passing near the interference source (such as clock and DC-DC power supply) as far as possible, and the shorter the routing is, the better.
4. EMC and signal integrity
(1) Termination resistance. It is better to connect a matching resistor at the end of high-speed line or digital signal line with high frequency and long routing.
(2) Input signal line is connected with small capacitance in parallel. The signal line input from the interface should be connected to a small capacitance of skin method level near the interface. The capacitance shall be determined according to the signal strength and frequency, and shall not be too large, otherwise the signal integrity will be affected. For low-speed input signals, such as key input, a small capacitance of 330pF can be selected.
(3) Driving capacity. For example, the switch signal with large driving current can be driven by a triode; Buffers (such as 74LS224) can be added to drive buses with large fan outs.
5. Silk screen
(1) Board name, time, PN code.
(2) Dimensions. Mark the pins or key signals of some interfaces (such as array).
(3) Component tag. The component labels shall be placed in proper positions, and the dense component labels can be placed in groups. Be careful not to place it in the position of the vias.
Mark point. For PCB to be machine welded, two to three Mark points need to be added.